BITS Pilani

  • Page last updated on Saturday, May 19, 2018

Digital Design Lab

Digital Design Lab

Courses to cater

  • DIGITAL DESIGN (Course No. CS F215 /ECE F215 /EEE F215 /INSTR F215) for UG students (Computer Science, Electronics and Communication, Electrical and Electronics, Electronics and Communication branches).





  • Universal Digital Lab Trainer PHY-1002 Kit
  • PHY- 451 Universal Digital IC Kit
  • Analog Discovery (PC based Logic Analyser boards)
  • ALS _FPGA ( XILINX _XC3S50) Kit


  • Faculty Coordinator: Prof. BVVSN PRABHAKAR RAO
  • Other Faculty Users: Dr. Souvik Kundu & Dr. Soumya J
  • Lab Technician: Ms. B. Krishnaveni
  • PhD / Masters Students: ·Mr. Sravan Kumar Vittapu (Research Scholar) · Mr. Michael Preetam Raj (Research Scholar) ·Mr. V Sarath Sankar (Research Scholar)


  • Familiarization of Bench Equipment and Introducing ISE XILIX Tool
  • Implementation of Boolean Functions using Logic Gates.
  • Write Verilog code at gate level and verify 3-input majority function using AND-OR logic gates, Even – Odd parity generation, Binary – Gray code conversion
  • Adders and Subtractors
  • Write Verilog code at gate level and verify Half Adder, 1 – bit full adder, 4 – bit full adder using Half Subtractor and Full Subtractor
  • BCD Adder
  • Write Verilog code for Adder-Subtractor, 4 – bit full adder using data – flow modelling, BCD Adder
  • Decoders, Multiplexers and Demultiplexers.
  • Comparators & Arithmetic Logic Unit.
  • Latches & Flip-Flops
  • Write Verilog code for implementing various flip-flops
  • Counters
  • Write Verilog code for implementing counters
  • Shift Registers
  • Sequential Circuits
  • Memories and FPGAs



[Project] Dr. Souvik Kundu (PI) and Prof. Souri Banerjee (Physics, co-PI) received a project from BRNS (3 years, ~35 lakhs) - "Metal-oxide and Nanocomposite based low-power non-volatile switching device".
[PhD Student Paper] Manu Gupta, V Rajagopalan, E P Pioro, B.V.V.S.N. Prabhakar Rao, Volumetric Analysis of MR Images for Glioma Classification and their Effect on Brain Tissues, Signal, Image and Video Processing, Published Online, 2017. 


[15 Sep 2017Visit by Prof. R. Karmalkar, IIT Madras
[24 Aug 2017Visit by Prof. Varun Jeoti (Signal processing and Wireless communication), University Technology Petronas, Malaysia 
[11 Aug 2017Interaction with New EEE Students

Recent Publications

Detailed List...

1. Manu Gupta, V Rajagopalan, E P Pioro, B.V.V.S.N. Prabhakar Rao, Volumetric Analysis of MR Images for Glioma Classification and their Effect on Brain Tissues, Signal, Image and Video Processing, Published Online, 2017.  

2. S. Chitraganti, R. Toth, N. Meskin, J. Mohammadpour, Stochastic model predictive tracking of piecewise constant references for LPV  SystemsIET Control Theory & Applications, in press, 2017.

3. Soham Jariwala, Rohit Nagpal, Saksham Phul, Sanket Goel and Balaji Krishnamurthy, Modeling the performance of an enzymatic glucose fuel cell, accepted for publication with Journal of Electroanalytical Chemistry, 2017.

4. Venkateswaran PS, Santosh Dubey, Abhishek Sharma, Ajay Agarwal and Sanket Goel*, Stereolithographic 3D Printed Microfluidic viscometer for Rapid Detection of Automobile Fuel Adulteration, accepted for publication with Sensor Letters, 2017.

5. S. K. Sahoo, A. Gangishetty, R. Sahoo and M. Muglikar, High Performance Ternary Adder using CNTFET, IEEE Transactions on Nanotechnology , Vol. 99, pp.1-1. 2017.

6. Young Ho Kim, Jeong-Woo Sohn,  Yeon Kyung Lee, Jaehoon Jung, Minyeong Jeong, Sanket Goel, Hee Jin Kim,  Sang-June Choi, Preparation of pH Sensitive MMT/PEGMEA Nanocomposite Micropatterns by Rapid and Simple UV Curing Procedures,Journal of Nanoelectronics and Optoelectronics, Vol 12(6), pp. 550-556, 2017.

7. Ganesh Kumar Ganjikunta and Subhendu Kumar Sahoo, An area-efficient and low-power 64-point pipeline Fast Fourier Transform for OFDM applications, Integration, the VLSI Journal, Vol. 57, pp. 125-131, 2017.

8. Kotha Srinivasa Reddy and Subhendu Kumar Sahoo, An approach for fixed coefficient RNS-based FIR filter, International Journal of Electronics, Vol. 104 (8), 2017.

An institution deemed to be a University estd. vide Sec.3 of the UGC Act,1956 under notification # F.12-23/63.U-2 of Jun 18,1964

© 2018 Centre for Software Development,SDET Unit, BITS-Pilani, India.

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