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Publications/Patents

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Publications/Patents

Patents

US Granted/Applied 
  • S. Kim, K. J. Kuhn, T. Ghani, A. Murthy, M. Armstrong, R. Rios, A. Pethe and W.Rachmady, “Integration methods to fabricate internal spacers for nanowire devices”, US 9,484,447 B2
  • A. Cappellani, A. Pethe, T. Ghani and H. Gomez, “Methods for fabricating strained gateall-around semiconductor devices by fin oxidation using an undercut etch-stop layer”, US 9,484,272
  • A. J. Pethe, T. Ghani, M. Bohr, C. Webb, H. Gomez and A. Cappellani, “Gate Contact structure over active gate and method to fabricate the same”, US 9,461,143 B2
  • F. Greer, A. Joshi, K. Kashefi, A. S. Lee, A. Pethe and J. Watanabe, “Reduction of native oxides by annealing in reducing gas or plasma”, US 9,312,137
  • A. Cappellani, P. Pathi, B.E. Beattie and A.J. Pethe, “Three-dimensional germaniumbased devices formed on globally or locally isolated substrates”, US 9,041,106
  • J.Su, A. Bodke, A. Pethe and J. Watanabe, “Oxide removal by remote plasma treatment with fluorine and oxygen radicals”, US 8,945,414 B2
  • A. Cappellani, A.J. Pethe, T. Ghani and H. Gomez, “Strained gate-all-around semiconductor device formed on globally or locally isolated substrates”, US 8,735,869
  • A. Murthy, D. B. Aubertine, T. Ghani, A.J. Pethe, “Semiconductor Device having doped epitaxial region and its methods of fabrication”, US 8,598,003 B2
  • A. Joshi, S. Barstow, P. Besser, A. Bodke, G. Bouche, N. Fuchigami, Z. Hong, S. Koh, A.S. Lee, S. Majumdar, A. Pethe and M. Raymond, “Semiconductor Device Metal-insulator-Semiconductor contacts with interface layers and methods to form the same”, US 14/576,597 Application
  • S. Majumdar, A. Joshi, K. Kashefi, A.S. Lee, A. Pethe and B. Yang, “Metal-insulatorsemiconductor (MIS) contact with controlled defect density”, US 14/315,718 Application
  • B. Yang, A. Pethe, A. Lee, A. Joshi, A. Bodke, K. Kashefi and S. Majumdar, “Methods for depositing an aluminum oxide layer over germanium substrates in the fabrication of integrated circuits”, US 14/044,514 Application
  • B. Yang, A. Pethe, A. Lee, A. Joshi, A. Bodke, K. Kashefi and S. Majumdar, “Methods for removing a native oxide layer from germanium substrates in the fabrication of integrated circuits”, US 14/044,376 Application
  • A. Pethe, J. S. Sandford, C. J. Weigand and R. D. James, “Improved area scaling on trigate transistors”, US 2013/041020 Application

Publications

  • Fatima, A., Pethe, A., “An RRAM based Neuromorphic Accelerator for Speech based Emotion Recognition”, Neuromorphic Computing Systems for Industry 4.0, Book Chapter, IGI Global, 2023;
  • Fatima, A., Pethe, A., “Embedded System with In-Memory Compute Neuromorphic Accelerator for Multiple Applications”, Smart Embedded Systems: Recent Advances and Applications, Book Chapter, CRC Press: Taylor & Francis Group, 2023;
  • Kar, A., and Pethe A., "Implementing Programmable Multi-leveled Cell ReRAMs for Analog Matrix-Vector Multipliers", Microelectronics Jounral 2022 accepted.
  • Fatima, A., Pethe, A., “Implementation of RRAM based Swish Activation Function and its Derivative on 28nm FD-SOI”, International Electrical Engineering Congress (iEECON), IEEE, 2022; https://ieeexplore.ieee.org/document/9741701
  • Fatima, A., Pethe, A., “Periodic Analysis of Resistive Random Access Memory (RRAM) based Swish Activation Function”, Springer Nature Computer Science Journal, 2022; https://doi.org/10.1007/s42979-022-01059-3
  • A. Fatima and A. Pethe, "NVM Device based Deep Inference Architecture using Self-Gated Activation Functions", Int. Conference on Machine vision and Augmented Intelligence (MAI), Sringer 2021 https://doi.org/10.1007/978-981-16-5078-9_4
  • A. Verma and A. Pethe, "Modelling and Analysis of Multi-Junction Photovoltaic Cells," 2020 IEEE 17th India Council International Conference (INDICON), 2020, pp. 1-6, doi: 10.1109/INDICON49873.2020.9342293
  • A. Lee, A. Pethe, A. Joshi, G. Bouche, S. Koh, H. Nimii, S. Majumdar, Z. Hong, N. Fuchigami, I. Lim, A. Bodke, M. Raymond, P. Besser and S. Barstow, “ Impact of thermal treatments on the Schottky barrier height reduction at the Ti-TiOx-Si interface for contact resistance reduction”, Si Nanoelectronics Workshop, 2014
  • D. Kuzum, A.J. Pethe, T, Krishnamohan, Saraswat K.C., “Ge (100) and (111) N- and PFETs with high mobility and low-T mobility characterization”, IEEE Transactions on Electron Devices, 56, 2009 pp. 648-655
  • D. Kuzum, T. Krishnamohan, A. Pethe, Y. Oshima, Y. Sun, J. McVittie, PA. Pianetta,PC. McIntyre, K.C. Saraswat, “Ge Interface passivation techniques and thermal stability”,ECS Transactions, 16, 2008 pp. 1025-1029
  • K.C. Saraswat, D. Kim, T. Krishnamohna, D. Kuzum, A.K. Okyay, A. Pethe, H. Y. Yu, “Germanium for high-performance MOSFETs and optical interconnects”, ECSTransactions, 16, 2008 pp. 3-12 Invited
  • D. Kuzum, T. Krishanmohan, A.J. Pethe, A.K. Okyay, Y. Oshima, Y. Sun, J. P McVittie, P. A. Pianetta, P. C. McIntyre and K. C. Saraswat, “Ge-interface engineering with ozone oxidation for low interface-state density”, IEEE Electron Device Letters, 29, 2008 pp. 328-330
  • K.C. Saraswat, D. Kim, T. Krishnamohan and A. Pethe, “Performance Limitations of Si bulk CMOS and alternatives to future ULSI”, ECS Transactions 2008, 8 pp. 9-14 Invited
  • D. Kuzum, A. J. Pethe, T. Krishnamohan, Y. Oshima, y. Sun, J. P. McVittie, P. A. Pianetta, P.C. McIntyre and K. C. Saraswat, “Interface-Engineered Ge (100) and (111) Nand P-FETs with High Mobility”, IEDM, 2007 Washington D.C.
  • A.K. Okyay, A. J. Pethe, D. Kuzum, S. Latif, D. A. B. Miller and K. C. Saraswat, "Novel Si-based CMOS Optoelectronic Switching Device Operating in the Near Infrared", OFC/NFOEC conference, Los Angeles, March 2007.
  • Ali K. Okyay, A. J. Pethe, D. Kuzum, S. Latif, D. A. Miller, K. C. Saraswat, "Novel Si-Based Optoelectronic Switching Device: Light to Latch," CLEO/QELS 2007, Baltimore, Maryland, May 6-11, 2007.
  • A.K. Okyay, A. J. Pethe, D. Kuzum, S. Latif, D. A. Miller and K.C. Saraswat, “SiGe optoelectronic metal-oxide semiconductor field effect transistor”, Optics Letters, Vol. 32,Iss. 14, pp. 2022-2024.
  • A. Pethe and K. Saraswat, "High Mobility, Low Parasitic Resistance Si/Ge/Si Heterostructure Channel Schottky Source/Drain PMOSFETs," IEEE Device Research Conf., South Bend, Indiana, June 2007
  • A. Pethe and K. C. Saraswat, "Interface state Density measurement at GeOxNy-Ge interface for Ge MIS Application,” IEEE SISC, Dec. 2006.
  • A. Pethe, T. Krishnamohan, D. Kim, S. Oh, H.-S.P. Wong, Y. Nishi and K. Saraswat, "Investigation of the Performance Limits of III-V Double-Gate NMOSFETs", 16th Biennial University/Government/Industry Microlectronics Symposium, San Jose, CA 2006. Invited
  • K. C. Saraswat, C. O. Chui, T. Krishnamohan, D. Kim, A. Nayfeh and A. Pethe, "High Performance Germanium MOSFETs", Symp. B, E-MRS IUMRS ICEM Spring Meet., Nice (France), May 29 - June 2, 2006. Published in Materials Science and Engineering: B, Vol. 135, No. 3, 15 Dec. 2006, pp.242-249. Invited
  • K. C. Saraswat, C. O. Chui, T. Krishnamohan and A. Pethe, "High Mobility Materials and Novel Device Structures for High Performance Nanoscale MOSFETs," IEEE Int. Electron Dev. Meet. San Francisco, Dec. 2006. Invited
  • A.J.Pethe, T. Krishnamohan, D. Kim, S. Oh, H.-S.P. Wong, Y. Nishi and K. Saraswat, "Investigation of the Performance Limits of III-V Double-Gate NMOSFETs", IEEE International Electron Devices Meeting (IEDM) 2005 Technical Digest, pp. 619-622, Washington, D.C., Dec. 2005.
  • A. Pethe, T. Krishnamohan, K. Uchida, K. C. Saraswat, "Analytical Modeling of Ge and Si Double-Gate(DG) NFETs and the Effect of Process Induced Variations (PIV) on Device Performance," IEEE SISPAD, Sept. 2004.

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