Publications

Journal Publications :

Pravin Mane, Nishil Talati, Ameya Riswadkar, Ramesh Raghu, C.K. Ramesha, "Stateful-NOR based reconfigurable architecture for logic implementation", Microelectronics Journal, Volume 46, Issue 6, pp. 551-562, 2015, ISSN 0026-2692, https://doi.org/10.1016/j.mejo.2015.03.021.

N. Talati, S. Gupta, P. Mane and S. Kvatinsky, "Logic Design Within Memristive Memories Using Memristor-Aided loGIC (MAGIC)," in IEEE Transactions on Nanotechnology, vol. 15, no. 4, pp. 635-650, July 2016. doi: 10.1109/TNANO.2016.2570248

Pravin Mane, Nishil Talati, Ameya Riswadkar, Ramesh Raghu, C. K. Ramesha, "Reconfiguration on nanocrossbar using material implication", Sadhana Journal (Springer), Vol. 42, No. 1, pp. 33-44, January 2017, doi:10.1007/s12046-016-0582-8, URL: http://link.springer.com/article/10.1007/s12046-016-0582-8

Prashil Parekh, Samidh Mehta, Pravin Mane, "Truncation Based Approximate Multiplier For Error Resilient Applications", International Journal of Electronics Letters, DOI: 10.1080/21681724.2021.1914183

Conference Publications :

P. S. Mane, I. Gupta and M. K. Vasantha, "Implementation of RISC Processor on FPGA," 2006 IEEE International Conference on Industrial Technology, Mumbai, 2006, pp. 2096-2100, doi: 10.1109/ICIT.2006.372448

K. Bhardwaj and P. S. Mane, "ACMA: Accuracy-configurable multiplier architecture for error-resilient System-on-Chip," 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), Darmstadt, 2013, pp. 1-6, doi: 10.1109/ReCoSoC.2013.6581532

P. S. Mane, N. Paul, N. Behera, M. Sampath and C. K. Ramesha, "Hybrid CMOS - Memristor based configurable logic block design," 2014 International Conference on Electronics and Communication Systems (ICECS), Coimbatore, 2014, pp. 1-5, doi: 10.1109/ECS.2014.6892532

K. Bhardwaj, P. S. Mane and J. Henkel, "Power- and area-efficient Approximate Wallace Tree Multiplier for error-resilient systems," Fifteenth International Symposium on Quality Electronic Design, Santa Clara, CA, 2014, pp. 263-269, doi: 10.1109/ISQED.2014.6783335

Pravin Mane, Vivek Varier, Unnikrishnan S Prasad, Shridevi Muthkhod, C K Ramesha, "Nanocrossbar Based LUT Design For Reconfigurable Logic", International Conference on Microelectronics, Circuits and Systems, July 2014, Kolkata

K. Bhardwaj and P. S. Mane, "C3Map and ARPSO based mapping algorithms for energy-efficient regular 3-D NoC architectures," Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, Hsinchu, 2014, pp. 1-4, doi: 10.1109/VLSI-DAT.2014.6834909

P. Mane, N. Talati, A. Riswadkar, R. Raghu and C. K. Ramesha, "Implicating logic functions with memristors," 2014 International SoC Design Conference (ISOCC), Jeju, 2014, pp. 232-233, doi: 10.1109/ISOCC.2014.7087622

P. Mane, N. Talati, A. Riswadkar, B. Jasani and C. K. Ramesha, "Implementation of NOR Logic Based on Material Implication on CMOL FPGA Architecture," 2015 28th International Conference on VLSI Design, Bangalore, 2015, pp. 523-528, doi: 10.1109/VLSID.2015.94

M. Sampath, P. S. Mane and C. K. Ramesha, "Hybrid CMOS-memristor based FPGA architecture," 2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA), Bangalore, 2015, pp. 1-6, doi: 10.1109/VLSI-SATA.2015.7050461

P. Mane, S. Mishra, R. Deliwala and Ramesha C.K., "Adder implementation in reconfigurable resistive switching crossbar," 2017 18th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, 2017, pp. 403-408, doi: 10.1109/ISQED.2017.7918349

P. S. Vitthal, S. Balasubramanian and P. S. Mane, "Color Analysis and Classification Based on Machine Learning Technique Using RGB Camera Industrial Practice and Experience Paper," 2017 IEEE International Conference on Computational Intelligence and Computing Research (ICCIC), Coimbatore, 2017, pp. 1-5, doi: 10.1109/ICCIC.2017.8524580

P. S. Vitthal, A. Basak and P. S. Mane, "Design of Voltage Amplifiers with optimization of Multiple Design Parameters," 2018 4th International Conference on Devices, Circuits and Systems (ICDCS), Coimbatore, India, 2018, pp. 72-76, doi: 10.1109/ICDCSyst.2018.8605066

BITS Pilani

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