BITS Pilani

  • Page last updated on Friday, March 18, 2022

Sanjay Vidhyadharan - Doctoral Thesis

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Assistant Professor

  • Title : ‘Novel Gate Overlap Tunnel FET based Ultra-Low Power VLSI Circuits as a viable alternative to CMOS Technology’.
  • Supervisor : Dr. Surya Shankar Dan
  • Institute : BITS Pilani, Hyderabad Campus.
  • Status : Completed Jan 2020.

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